The present invention relates to improved semiconductor integrated circuits, particularly ones containing CMOS logic circuits. More particularly, it relates to technology for effectively suppressing fluctuations and a drop in power-source voltage to achieve a constant power-source voltage and stable high-speed operation over an extended time period.
FIG. 46 schematically illustrates the structure of a conventional semiconductor integrated circuit, in which are shown a plurality of (three in the drawing) semiconductor integrated circuits 1 based on CMOS logic. Each of the semiconductor integrated circuits is composed of a logic input circuit 11, an internal logic circuit 12, and a logic output circuit 13, which are integrally formed on a single semiconductor substrate. External terminals 14 are for achieving external connection. The three semiconductor integrated circuits 1 are mounted on the same printed circuit board 2 and operated with a power-source voltage Vc21, which is from an external power source 3 and distributed to each of the semiconductor integrated circuits 1 through a common constant-voltage circuit 4 and a power-source line 21.
The constant-voltage circuit 4 is composed of a constant-voltage circuit T41 using a row of diodes and an output MOS transistor T42.
The conventional semiconductor integrated circuit has the following problem.
As shown in FIG. 46, a considerable amount of parasitic resistance Rs and inductance Ls is produced on the power-source line 21 between the constant-voltage circuit 4 and each of the semiconductor integrated circuits 1. Consequently, even though the output voltage Vc21 from the constant-voltage circuit 4 is held constant as shown in FIG. 47, a power-source voltage Vc22 actually supplied to each of the semiconductor integrated circuits 1 may fluctuate due to a voltage drop on the power-source line 21, the superimposition of external noise N, or the like and is not necessarily constant.
As a result, each of the semiconductor integrated circuits 1 becomes susceptible to a misoperation resulting from the fluctuations of the operating power-source voltage Vc22. In particular, a semiconductor integrated circuit using a voltage (e.g., 3 V) lower than a normal voltage value (5 V) has been employed in a contemporary electronic circuit device and associated equipment having a battery as a power source. Since the semiconductor integrated circuit operating at such a low power-source voltage is highly sensitive to fluctuations in power-source voltage, a misoperation is caused by only slight voltage fluctuations resulting from the parasitic resistance Rs or inductance Ls on the power-source line 21.
The power-source voltage may also fluctuate depending on the operation of the internal circuit of the semiconductor integrated circuit 1. Voltage fluctuations may cause RF noise and exert a greater influence on the internal circuit thereof than exerted by a voltage drop, resulting in a misoperation.
Thus, the conventional semiconductor integrated circuit has the problem of high susceptibility to a misoperation resulting from voltage fluctuations on the power-source line, from the superimposed noise, or from the operation of the internal circuit thereof.
To solve the problem, Japanese Laid-Open Patent Publication HEI 6-104720 has proposed a structure having an internal constant-voltage circuit provided therein. However, the structure with the internal constant-voltage circuit increases an area occupied by an LSI and has not given sufficient consideration to the influence of a voltage drop accompanying the provision of the additional constant-voltage circuit.
In general, the semiconductor integrated circuit as shown in FIG. 46 is designed to be operable even when the power-source voltage Vc20 from the external power source 3 fluctuates to some extent. Because allowance has thus been made for the fluctuation of the power-source voltage Vc20, the performance of the semiconductor integrated circuit should be underestimated accordingly. Hence, the semiconductor integrated circuit cannot be designed to deliver performance only under optimum conditions, which presents another problem.